NDLI: Modeling the Impact of Random Grain Boundary Traps on the Electrical Behavior of Vertical Gate 3-D <sc>NAND</sc> Flash Memory Devices

Content Provider	IEEE Xplore Digital Library
Author	Yi-Hsuan Hsiao Hang-Ting Lue Wei-Chen Chen Kuo-Pin Chang Yen-Hao Shih Bing-Yue Tsui Kuang-Yeu Hsieh Chih-Yuan Lu
Copyright Year	1963
Abstract	The 3-D stacking of multiple layers of NAND using thin-film transistor (TFT) devices is widely accepted as the next step in continuing NAND Flash scaling. Low mobility and reliability problems are two well-known concerns regarding TFT devices. However, another important implication of using TFT devices is that the Vt variation induced by randomly distributed grain boundaries degrades the array performance. In this paper, an extensive TCAD simulation was conducted to systematically investigate how grain boundary generated traps affect NAND Flash devices. Minimizing the density of grain boundary traps is crucial for array performance. In addition, optimal gate control ability reduces the impact of grain boundaries. Thus, using double gate architecture in vertical gate 3-D NAND is favorable. Furthermore, when pitch is scaled in the future, device exhibiting smaller channel thickness should be used to increase the gate control.
Sponsorship	IEEE Electron Devices Society
Starting Page	2064
Ending Page	2070
Page Count	7
File Size	2789728
File Format	PDF
ISSN	00189383
Volume Number	61
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Grain boundaries Logic gates Computer architecture Microprocessors Flash memories Electric potential Thin film transistors vertical gate (VG). 3-D NAND Flash grain boundary grain boundary traps poly Si thin-film transistor (TFT) vertical gate (VG)
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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