NDLI: Adaptive Cache Management for Energy-Efficient GPU Computing

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Adaptive Cache Management for Energy-Efficient GPU Computing

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Adaptive Cache Management for Energy-Efficient GPU Computing

Content Provider	ACM Digital Library
Author	Chang, Li-Wen Chen, Xuhao Rodrigues, Christopher I. Lv, Jie Hwu, Wen-Mei Wang, Zhiying
Abstract	With the SIMT execution model, GPUs can hidememory latency through massive multithreading for many applications that have regular memory access patterns. To support applications with irregular memory access patterns, cache hierarchies have been introduced to GPU architectures to capture temporal and spatial locality and mitigate the effect of irregular accesses. However, GPU caches exhibit poor efficiency due to the mismatch of the throughput-oriented execution model and its cache hierarchy design, which limits system performance and energy-efficiency. The massive amount of memory requests generated by GPU scause cache contention and resource congestion. Existing CPUcache management policies that are designed for multicore systems, can be suboptimal when directly applied to GPUcaches. We propose a specialized cache management policy for GPGPUs. The cache hierarchy is protected from contention by the bypass policy based on reuse distance. Contention and resource congestion are detected at runtime. To avoid oversaturatingon-chip resources, the bypass policy is coordinated with warp throttling to dynamically control the active number of warps. We also propose a simple predictor to dynamically estimate the optimal number of active warps that can take full advantage of the cache space and on-chip resources. Experimental results show that cache efficiency is significantly improved and on-chip resources are better utilized for cache sensitive benchmarks. This results in a harmonic mean IPCimprovement of 74% and 17% (maximum 661% and 44% IPCimprovement), compared to the baseline GPU architecture and optimal static warp throttling, respectively.
Starting Page	343
Ending Page	355
Page Count	13
File Format	PDF
ISBN	9781479969982
ISSN	10724451
DOI	10.1109/MICRO.2014.11
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2014-12-13
Access Restriction	Subscribed
Subject Keyword	Cache management Bypass Warp throttling Gpgpu
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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Adaptive Cache Management for Energy-Efficient GPU Computing

Efficient utilization of GPGPU cache hierarchy

Locality-Based Cache Management and Warp Scheduling for Reducing Cache Contention in GPU

Adaptive Cache Bypass and Insertion for Many-core Accelerators

Adaptive Cache Management for Energy-efficient GPU Computing

CAWS: criticality-aware warp scheduling for GPGPU workloads

On the Feasibility of Advanced Cache Indexing for High-Performance and Energy-Efficient GPGPU Computing

GPU register file virtualization

Efficient warp execution in presence of divergence with collaborative context collection

Adaptive Cache Management for Energy-Efficient GPU Computing

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