NDLI: Architectural Specialization for Inter-Iteration Loop Dependence Patterns

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Architectural Specialization for Inter-Iteration Loop Dependence Patterns

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Architectural Specialization for Inter-Iteration Loop Dependence Patterns

Content Provider	ACM Digital Library
Author	Ilbeyi, Berkin Zhang, Zhiru Batten, Christopher Tan, Mingxing Srinath, Shreesha Liu, Gai
Abstract	Hardware specialization is an increasingly common technique to enable improved performance and energy efficiency in spite of the diminished benefits of technology scaling. This paper proposes a new approach called explicit loop specialization (XLOOPS) based on the idea of elegantly encoding inter-iteration loop dependence patterns in the instruction set. XLOOPS supports a variety of inter-iteration data-and control-dependence patterns for both single and nested loops. The XLOOPS hardware/software abstraction requires only lightweight changes to a general-purpose compiler to generate XLOOPS binaries and enables executing these binaries on: (1) traditional microarchitectures with minimal performance impact, (2) specialized microarchitectures to improve performance and/or energy efficiency, and (3) adaptive microarchitectures that can seamlessly migrate loops between traditional and specialized execution to dynamically trade-off performance vs. energy efficiency. We evaluate XLOOPS using a vertically integrated research methodology and show compelling performance and energy efficiency improvements compared to both simple and complex general-purpose processors.
Starting Page	583
Ending Page	595
Page Count	13
File Format	PDF
ISBN	9781479969982
ISSN	10724451
DOI	10.1109/MICRO.2014.31
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2014-12-13
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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