NDLI: Dealing with the "itanium effect" (abstract only)

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Dealing with the "itanium effect" (abstract only)

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Dealing with the "itanium effect" (abstract only)

Content Provider	ACM Digital Library
Author	Richfield, Steve
Abstract	The "Itanium Effect" is a subtle organizational phenomenon leading to the wide adoption of a few widely applicable technologies, and the abandonment of many powerful but more narrowly applicable technologies. This results in potential technological revolutions simply dying on the vine due to a general lack of knowledge about potential enabling technologies. The main elements of the Itanium Effect are: 1. Technology loops, where a limited set of methods results in recreating products from the past, often without correcting their architectural errors 2. Compartmentalized conferences, e.g. FPGA, that work to inhibit designs that merge disciplines 3. Little PhD student participation, that chokes off the supply of fresh ideas 4. Procedural exclusion of futurist and top-down discussions, so that the entire industry proceeds without futurist goals 5. Keeping problems secret, so that no one else can help The Itanium Effect has become the leading barrier to advancement of high performance computing. We now appear to be on the verge of a computational singularity, where a hundredfold performance gain is available from architectural changes alone, due to the elimination of various sorts of choke points. Unfortunately, there is presently a high threshold to overcome, as there are several enabling technologies that must be simultaneously developed. This can't come from CPU, GPU, or FPGA manufacturers acting alone. These areas must be merged, and somewhat obscure enabling technologies added to glue it all together. The prospective glue technologies examined in this paper include: 1. Logarithmic arithmetic 2. Medium-grained and multi-grained FPGAs 3. Coherent memory mapping 4. Variable data chaining 5. Fast aggregation across ALUs 6. Blurring the SIMD/MIMD distinction using small local program memories 7. A simple horizontal microcoding interface for applications 8. Failsoft configuration on power-up 9. Failsoft partial reconfiguration during execution 10. Physically symmetrical pinout to facilitate the use of defective components. 11. An architecture-independent universal compiler to compile a new APL-level language.
Starting Page	277
Ending Page	277
Page Count	1
ISBN	9781450305549
DOI	10.1145/1950413.1950466
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2011-02-27
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Failsoft reconfiguration Logarithmic arithmetic Fpga Cpu Befuddlement Data chaining Horizontal microcoding Alu Symmetrical pinout Gpu Itanium effect Instruction lookahead Aggregation Medium granularity Secded Universal compiler Genetic algorithm Simd/mimd Apl Coherent memory mapping Mentoring Multi-grain Flops/transistor
Content Type	Text
Resource Type	Article

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