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| Content Provider | IET Digital Library |
|---|---|
| Author | Xie, Haiwu Liu, Hongxia Han, Tao Li, Wei Chen, Shupeng Wang, Shulong |
| Abstract | In this work, the authors propose and simulate a double L-shaped gate tunnel field-effect transistor (DLG-TFET) with the covered source–channel. The proposed structure improves the ON-state current by increasing the linear tunnelling area and has excellent subthreshold characteristics. The simulation focuses on the performance improvement of the device under different longitudinal gate length L g, interlayer silicon thickness T si, gate and source overlap length L ov, and covered source depth L s. For optimal parameters, the ON-state current of the proposed DLG-TFET increases up to 3.53 × 10−5 A/μm, and the current switch ratio(I on/I off) is 4.28 × 1011 at room temperature, moreover, a minimum subthreshold swing (SSmin) and an average subthreshold swing (SSave) are as low as 32.2 and 52.9 mV/Dec, respectively. Meanwhile, this work uses mixed device-circuit simulations to predict the performance of the inverter circuit implemented with proposed DLG-TFET. |
| Starting Page | 272 |
| Ending Page | 276 |
| Page Count | 5 |
| Volume Number | 15 |
| e-ISSN | 17500443 |
| Issue Number | Issue 4, Apr (2020) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/mnl/15/4 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/mnl.2019.0398 |
| Journal | Micro & Nano Letters |
| Publisher Date | 2020-04-01 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Average Subthreshold Swing Covered Source Depth Covered Source–channel Current Switch Ratio Design And Testing DLG-TFET Electronic Engineering Computing Elemental Semiconductor Equivalent Circuit Field Effect Device Field Effect Transistors Interlayer Silicon Thickness Inverter Circuit L-shaped Gate Tunnel Field-effect Transistor Linear Tunnelling Area Longitudinal Gate Length Minimum Subthreshold Swing Mixed Device-circuit Simulations ON-state Current Room Temperature Semiconductor Device Modelling Silicon Source Overlap Length Subthreshold Characteristic TCAD Simulation Technology CAD (electronics) Temperature 293 K to 298 K Tunnel Transistors Tunnelling |
| Content Type | Text |
| Resource Type | Article |
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