Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IET Digital Library |
|---|---|
| Author | Mitra, Suman Kumar Bhowmick, Brinda |
| Abstract | A surface potential-based analytical capacitance model is proposed for gate-on-source–channel silicon on insulator (SOI) tunnel field effect transistor (GOSC TFET). The capacitance in the GOSC TFET is evidently shared by the gate-to-source capacitance which reduces the miller capacitance and leads to better switching speed in the circuit application. The effect of drain voltage, gate voltage, gate oxide thickness and source doping on the capacitance has been analysed in detail. The good matching between the modelled and Technology Computer-Aided Design (TCAD) simulated surface potential leads to the accurate calculation of capacitance. The validation of the capacitance model is done by comparing the model result with the simulation result and a good agreement between them validates the model formulation. |
| Starting Page | 1672 |
| Ending Page | 1676 |
| Page Count | 5 |
| Volume Number | 13 |
| e-ISSN | 17500443 |
| Issue Number | Issue 12, Dec (2018) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/mnl/13/12 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/mnl.2018.5214 |
| Journal | Micro & Nano Letters |
| Publisher Date | 2018-12-01 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Design And Testing Drain Voltage Effect Elemental Semiconductor Equivalent Circuit Field Effect Device Field Effect Transistors Gate Oxide Thickness Gate Voltage Effect Gate-on-source–channel Silicon-on-insulator Tunnel Field Effect Transistor Gate-to-source Capacitance GOSC SOI TFET Miller Capacitance Model Formulation Physics-based Capacitance Model Semiconductor Device Model Semiconductor Device Modelling Semiconductor Doping Silicon Silicon-on-insulator Source Doping Surface Potential Surface Potential-based Analytical Capacitance Model Switching Speed TCAD Tunnel Transistors Tunnelling |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|