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| Content Provider | IET Digital Library |
|---|---|
| Author | Singh, Ashutosh Kumar Gaur, Hari Mohan Ghanekar, Umesh |
| Abstract | Testing is an essential process to validate the truthful functionality of logic circuits, devices, and systems. It accounts a large overhead in terms of additional hardware, time, and manpower which dramatically enhance overall cost of manufacturing. The efficacy of multiple control Fredkin (MCF) gates towards both online and offline testing paradigms is demonstrated here by exploiting their parity preserving and conservative properties. The authors introduce (i) a method of testing MCF circuits for the detection of bit-flip faults online; (ii) deterministic approaches for the identification of stuck-at, bridging, missing gate, and cross-point faults; and (iii) three test sets of size 2, n, and 2 ( n − 2 ) for the detection of these faults off-line. Experiments are performed on a set of benchmarking circuits to demonstrate the effectiveness of the proposed methods in terms of test overhead and fault coverage. Online testable circuits are formulated on account of 0.5% of overhead in terms of considered cost metrics and an average reduction up to 61% is calculated with respect to existing work in the area. The test sets show completeness for the detection of all considered fault models. Fault simulations for both the presented testing methodologies are carried out which shows 100% coverage. |
| Starting Page | 723 |
| Ending Page | 729 |
| Page Count | 7 |
| ISSN | 1751858X |
| Volume Number | 13 |
| e-ISSN | 17518598 |
| Issue Number | Issue 5, Aug (2019) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-cds/13/5 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2018.5245 |
| Journal | IET Circuits, Devices & Systems |
| Publisher Date | 2019-03-07 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Benchmarking Circuit Bit-flip Fault Detection Circuit Testing Conservative Property Considered Cost Metrics Cross-point Fault Identification Deterministic Approach Digital Circuit Design, Modelling And Testing Fault Coverage Fault Model Fault Simulation Fault Simulations Logic And Switching Circuit Logic Circuit Logic Design Method Logic Element Logic Gate Logic Testing MCF Circuit Testing Multiple Control Fredkin Gate Multiple Controlled Fredkin Circuit Offline Testing Paradigm Online Testable Circuit Online Testing Paradigm Parity Preserving Stuck-at Fault Identification Test Overhead Test Sets Testing Methodologies |
| Content Type | Text |
| Resource Type | Article |
| Subject | Control and Systems Engineering Electrical and Electronic Engineering |
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