NDLI: Built-in self test for C-testable ILA's

Content Provider	IEEE Xplore Digital Library
Author	Gala, M. Ross, D. Watson, K. Vasudevan, B. Utama, P.
Copyright Year	1982
Abstract	Testing of one-dimensional (1-D) unilateral iterative logic arrays (ILA's) of combinational cells with constant test vectors is studied and the concept of one repetition length (ORL) within the tests used for testing C-testable arrays is described. The impact of ORL on the test set size and the design of the test generator are discussed. ORL can dramatically reduce the on-chip test generator size with a negligible increase in the test set size. ORL, coupled with a single distinguishing sequence (DS) for ILA's with cell vertical outputs has proved to be attractive in terms of both reduced test set size and reduced test generator size. ORL testability can be used for C-testable arrays with single faulty cell and multiple faulty cells. The technique for using a single linear finite state machine (LFSM) for generating the necessary deterministic test patterns followed optionally by pseudorandom patterns from the same automaton is discussed. Use of an LFSM as a built-in test generator for only deterministic tests for 1-D ILA's is covered. With ORL, a compact LFSM based built-in self test (BIST) generator can deliver the test vectors to all the cells in the array. The exact probability distribution equation has been developed for additional bits needed to map a nonlinear machine (FSM) definition into a LFSM definition. The distribution clearly shows that the expected number of additional bits is very small, often zero.<>
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1388
Ending Page	1398
Page Count	11
File Size	1122854
File Format	PDF
ISSN	02780070
Volume Number	14
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Automatic testing Logic testing Circuit testing Logic arrays Circuit faults Built-in self-test Integrated circuit testing System testing Fault detection Automata
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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