NDLI: Analytical modelling of dielectric engineered strained dual-material double-gate-tunnelling field effect transistor

Content Provider	IET Digital Library
Author	Dash, Dinesh Kumar Saha, Priyanka Sarkar, Subir Kumar
Abstract	In this endeavour, the fruition of a resurrected tunnel field effect transistor has been investigated incorporating the idea of strained channel engineering along with the implementation of dielectric modulation technique. A non-homogeneous pattern of gate oxide layer is considered with hetero-dielectric architecture at the front gate and linearly graded oxide at the back gate. The buried oxide (BOX) thickness is kept intentionally double that of front oxide one to reduce electric field lines penetrating from drain to source, thus minimising fringing field effect. The surface potential function has been deduced with the help of 2D Poisson's equation assuming appropriate boundary conditions. Lateral electric field and hence total electric field have been computed from channel potential to study tunnelling efficiency, hot carrier effect and drain induced barrier lowering for the aimed device. Finally drain current has been derived with the help of Kane's model upon integration of band-to-band tunnelling rate and the results have been compared with previously published reports to corroborate the eminence of the proposed model. All analytical corollaries are in adroit amity with Silvaco ATLAS simulated data for avowal of the developed modelin terms of sublime short channel behaviour.
Starting Page	1039
Ending Page	1048
Page Count	10
ISSN	1751858X
Volume Number	13
e-ISSN	17518598
Issue Number	Issue 7, Oct (2019)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/13/7
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2018.5293
Journal	IET Circuits, Devices & Systems
Publisher Date	2019-06-11
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	2D Poisson Equation Band-to-band Tunnelling Rate Buried Oxide Thickness Channel Potential Design And Testing Dielectric Engineered Strained Dual-material Dielectric Modulation Technique Differential Equation (numerical Analysis) Drain Induced Barrier Dual-material Double-gate-tunnelling Field Effect Transistor Electric Field Electric Field Line Equivalent Circuit Field Effect Device Fringing Field Effect Gate Oxide Layer Hetero-dielectric Architecture Hot Carrier Effect Hot Carriers Kane Model Lateral Electric Field Nonhomogeneous Pattern Poisson Equation Resurrected Tunnel Field Effect Transistor Semiconductor Device Model Semiconductor Device Modelling Silvaco ATLAS Strained Channel Engineering Surface Potential Surface Potential Function Total Electric Field Tunnel Field-effect Transistors
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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