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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Zeinolabedinzadeh, S. Ebrahimi, B. Afzali-Kusha, A. |
| Copyright Year | 2009 |
| Description | Author affiliation: School of Electrical and Computer Engineering, University of Tehran, Iran (Zeinolabedinzadeh, S.; Ebrahimi, B.; Afzali-Kusha, A.) |
| Abstract | In this paper we investigate the possibility of power reduction in DGFET devices by means of Vth control technique applied for domino logics. Previously the effectiveness of Vth control method by means of back gate biasing has been investigated. In this paper we show that by special using back gate to control the threshold voltage we can save not only significant standby power but even considerable dynamic power for domino circuits while preserving their speed. Comparing Vth control method with the conventional double gate scheme and a recently published successful work, showed the performance of this method. It is shown that the performance of this method will be better in higher temperatures. Simulations were done by HSPICE circuit simulator using DGFET PTM model. |
| Starting Page | 297 |
| Ending Page | 300 |
| File Size | 591056 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424437047 |
| DOI | 10.1109/ULIS.2009.4897594 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-03-18 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Domino logic Energy consumption Vth-control method Circuit simulation Inverters Voltage control Double-gate FETs Logic circuits Threshold voltage double-gate field effect transistors Logic devices Clocks Parasitic capacitance |
| Content Type | Text |
| Resource Type | Article |
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