NDLI: A design and integration of Parametric Measurement Unit on to a 600MHz DCL

Content Provider	IEEE Xplore Digital Library
Author	Collins, E. In-Seok Jung Yong-Bin Kim Kyung Ki Kim
Copyright Year	2012
Description	Author affiliation: Department of Electronic Engineering, Daegu University, Gyeongsan, South Korea (Kyung Ki Kim) \|\| Department of Electrical and Computer Engineering, Northeastern University, Boston, United States (In-Seok Jung; Yong-Bin Kim) \|\| Analog Devices Inc., Dedham, United States (Collins, E.)
Abstract	A design and integration of highly accurate Parametric Measurement Unit (PMU) with 600MHz Driver, Comparator, and an Active Load (DCL) is presented in this paper using 0.5um BiCMOS process. These circuits are necessary components of Automated Test Equipment (ATE) systems used to test ICs and are often referred to collectively as the Pin Electronics (PE). PMUs are high accuracy low bandwidth circuits that have to drive a range of capacitive loads. The need for high accuracy requires the use of feedback and high gain operational amplifiers. The trade-offs to be made in these circuits is between accuracy and settling time. Better accuracy requires higher gain which requires more aggressive compensation which increases settling time. A design approach that strikes a balance between DC accuracy and settling time is proposed. Design techniques are used to minimize the output capacitance of the PMU allowing its integration onto the 600MHz DCL in the circuit that affect the speed of the test path. The measured data from the fabricated chip shows the minimum open loop gain of 42dB for desired linearity error with 600pF capacitor pole compensation capacitor in high current range. The design has been successfully integrated on 1580um by 600um BiCMOS silicon area with less than 150uV measured voltage error and less than 0.001% measured current error.
Starting Page	435
Ending Page	438
File Size	299521
Page Count	4
File Format	PDF
ISBN	9781467329897
e-ISBN	9781467329903
e-ISBN	9781467329880
DOI	10.1109/ISOCC.2012.6406889
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-11-04
Publisher Place	Korea (South)
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	automated test equipment Voltage measurement Force measurement parametric measurement unit Current measurement Force Bandwidth driver, comparator, and an active load Capacitance Phasor measurement units DCL
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in