NDLI: ASIP-based Design and Implementation of RSA for Embedded Systems

Content Provider	IEEE Xplore Digital Library
Author	Zhongbo Wang Zhiping Jia Lei Ju Renhai Chen
Copyright Year	2012
Abstract	The RSA public-key cryptosystem is widely used to provide security protocols and services in the network communication. However, design and implementation of the RSA cryptosystem to meet the real-time requirements of embedded applications are challenging issues, due to the computation intensive characteristics of the RSA arithmetic operations and the limited resources in the embedded systems. Various implementation and optimization methods have been proposed for RSA algorithm. However, software execution of RSA on general-purpose processors usually suffers from slow execution speed; while application-specific integrated circuit (ASIC) based approaches are lack of flexibility. In this work, we present a systematic design approach of application-specific instruction-set processor(ASIP) for the RSA cryptographic algorithm. We identify and optimize the custom instructions in the RSA algorithm, and extend the instruction set architecture (ISA) of a standard 32-bit RISC processor to accommodate them. We employ the Electronic System Level (ESL) methodology in the development of the proposed ASIP in the Xilinx Virtex5 LX110T FPGA platform. Compared to the original RISC ISA, our extended ASIP achieves approximate 2.69 times performance improvement with only 25.6% more resource required.
Starting Page	1375
Ending Page	1382
File Size	492054
Page Count	8
File Format	PDF
ISBN	9781467321648
DOI	10.1109/HPCC.2012.202
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-25
Publisher Place	United Kingdom
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis RSA Program processors Software algorithms Pipelines FPGA ASIP Encryption ESL
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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