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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chiu, J.-F. |
| Copyright Year | 2012 |
| Abstract | Because of the enlarging system size and the increasing number of processors, the probability of errors and multiple simultaneously failures become the norm rather than the exception. Therefore, to tolerate multiple failures is indispensable. Normally, most diskless checkpointing need the maximum recovery overhead no mater how many failures happen at the same time. However, a small number of processors' failures happen more frequently than the worse case. This study resolves the dilemma between more fault tolerance and fast recovery by presenting a novel diskless checkpointing which makes use of double mutual-aid checkpoints. It not only gives the necessary and sufficient condition but also proposes a method for determination the setting of double mutual-aid checkpoints. |
| Starting Page | 1015 |
| Ending Page | 1020 |
| File Size | 671371 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781467321648 |
| DOI | 10.1109/HPCC.2012.148 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-06-25 |
| Publisher Place | United Kingdom |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Checkpointing Sufficient conditions Program processors Memory management Lead Encoding Reliability tolerate multiple failures fast recovery diskless checkpointing |
| Content Type | Text |
| Resource Type | Article |
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