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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kasinski, K. |
| Copyright Year | 2011 |
| Description | Author affiliation: Department of Measurement and Instrumentation, AGH University of Science and Technology, Kraków, Poland (Kasinski, K.) |
| Abstract | The design of the PCBs (Printed Circuit Board) for testing naked die integrated circuits involves a series of tradeoffs. On the one hand the test setup should be as flexible as possible to provide means to diagnose or debug it during the first start-up, slightly modify the circuit for the second-step testing and should be accessible for an easy probe connection etc. On the other hand the circuit should be interference-proof and fully exploit the ASIC's capabilities. Enough to say that poorly designed PCB for the mixed-signal low-power, low-noise integrated circuit can successfully compromise the possible good noise-performance. This paper presents some solutions implemented by the author in test PCBs for the silicon detector readout integrated circuits designed at the AGH-UST ASIC design group. |
| Starting Page | 507 |
| Ending Page | 510 |
| File Size | 4117348 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781457703041 |
| e-ISBN | 9788393207527 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-06-16 |
| Publisher Place | Poland |
| Access Restriction | Subscribed |
| Rights Holder | Tech Univ of Lodz |
| Subject Keyword | Application specific integrated circuits Connectors ASIC Power supplies tests silicon detectors Capacitors Detectors Silicon printed circuit board integrated circuit PCB |
| Content Type | Text |
| Resource Type | Article |
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