NDLI: Evaluation of power gating under transistor aging effect issues in 22nm CMOS technology

Please wait, while we are loading the content...

2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES)

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013

Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2012

Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011

Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010

International programme committee

Table of contents

General invited papers

CMOS sensor arrays for bio molecule diagnostics

Device-conscious circuit designs for low-voltage nanoscale CMOS LSIs

Energy saving by power electronics in household and automotive applications

Ultra-thin body Silicon On Insulator and nanowire transistors for 22nm technology node and below

Compact modeling for advanced analog/RF IC applications

3D simulations of Si-detectors for high energy physics and astronomy

A hybrid Verilog-A and equation-defined subcircuit approach to mos switched current analog cell modeling and simulation in the transient and large signal AC domains

A universal model for calculating capacitive and resistive coupling on lightly and heavily doped CMOS processes

Analog performance of advanced CMOS in weak, moderate, and strong inversion

Analytical 2D model for the channel electric field in undoped Schottky barrier Double-Gate MOSFET

Analytical inversion-mode varactor modeling based on the EKV model and its application to RF VCO design

Capabilities and limitations of equivalent circuit models for modeling advanced Si FET devices

Compact physics-based model for ultrashort FinFETs

Customer-oriented product engineering of micro and nano devices

Process control monitor based extraction procedure for statistical compact MOSFET modeling

State-of-the-art microwave device characterization using large-signal network analyzers

High performance and embedded architecture and compilation

Automatic installation of software-based fault tolerance algorithms in programs generated by GCC compiler

Enhancing the Grid Alu processor for a better exploitation of the functional units

Instructionless processor architecture using dynamically reconfigurable logic

Trace-based runtime analysis of embedded real-time systems

xTCA for instrumentation

AMC radiation monitoring module for ATCA/μTCA based low level RF control system

AMC timing receiver and clock synthesizer module for the LLRF system

Application for management and monitoring of xTCA hardware

ATCA carrier board with dedicated IPMI controller

Design of eight-channel ADC card for GHz signal conversion

PCI Express Hot-Plug mechanism in Linux-based ATCA control systems

Power supply unit for ATCA-based piezo compensation system

Sub-LSB DAC resolution enhancement applied to LLRF control

Design of integrated circuits and microsystems

64 channel acquisition system for recording biomedical signals

A 0.5–6GHz low gain linear RF front-end in 90nm CMOS

A 1.2V 900nW conductance converter

A 11-bit, 12.5 MHz, low power low voltage continuous-time Sigma-Delta modulator

A 2.5MS/s 225 µW 8-bit charge redistribution SAR ADC for multichannel applications

A floating N-DMOS switch for RGB LED control

A new very high speed CMOS 4−2 compressor for fast digital arithmetic circuits

Aliasing-free variable gain Delta Sigma Modulator for use in an analog frontend

An Ashenhurst disjoint and non-disjoint decomposition of logic functions in Reed-Muller spectral domain

An energy harvesting circuit for self-powered sensors

Analog low-voltage low-power CMOS circuit for learning Kohonen networks on silicon

Automated DCT layout generation using AMPLE language

Biology-derived synaptic dynamics and optimized system architecture for neuromorphic hardware

Charge sharing switched capacitor integrator

CMOS coupled multivibrators for WMTS applications

CORDIC and SVD implementation in digital hardware

Design of a 10-bit low power current-steering digital-to-analog converter based on a 4-D thermometer decoding matrix

Design of CMOS analog and digital phase-locked loops based on resonant VCO

Design of integrated matched resistors, capacitors and inductors

Digital implementation of a programmable type-2 fuzzy logic controller

Digitally programmable delay-locked-loop with variable charge pump current

Four-quadrant CMOS transconductance multiplier operating at low voltage and high-speed

Improving stress effect and low noise design of the integrated on-panel TFT gate driver

Kohonen winner takes all neural network realized on microcontrollers with AVR and ARM cores

Low power 1 GHz charge pump phase-locked loop in 0.18 µm CMOS process

Low power, high dynamic range, sample&hold circuit and analogue multiplexer for multi-channel recording of neuronal signals

Low-power, high-speed, and low-noise X-ray readout channel in 0.18µm CMOS

Markup language based design tool integration method in distributed design environments

Modelling of capacitor mismatch and non-linearity effects ini charge redistribution SAR ADCs

MOSFET-only wideband LNA with noise cancelling and gain optimization

On hardware implementation of fuzzy processing

Optimized queue based communication in VLSI using a weakly ordered binary heap

Practical issues of 2.4 GHz RF circuit design: Simulation versus measurement results

Programmable triangular neighborhood function for kohonen self-organizing map implemented on chip

Quarter-square analog four-quadrant multiplier based on CMOS invertes and using low voltage high speed control circuits

The design of low power 11.6mW high speed 1.8Gb/s stand-alone LVDS driver in 0.18-µm CMOS

The Time-over-Threshold based silicon strip detector readout

Thermal issues in microelectronics

A novel approach of logi-thermal simulation methodology and implementation for ASIC designs

Multichannel system for real time registration of electronic circuit temperature response

NMOS current mirror thermal analysis

Nonlinear compact thermal model of SiC power semiconductor devices

SiC Schottky diode electrothermal macromodel

Temperature fields and reliability of thick-film components under pulse mode operation

Analysis and modelling of ICs and microsystems

A rapid analysis of very short channel MOSFET performances by using a dynamic simple model

A fast method for Transistor Circuit Voltage Range analysis using linear programming

Analysis of transient radiation effects in III–V compound high electron mobility transistors using mixed-mode 3D simulations

Application of the SMPI quality factor for the characterization of mixer's nonidealities

Comparison of averaging and harmonic balance methods for switched DC-DC converters

Hydrogen bonding network as a DC level shifter and a power amplifier

Krummenacher feedback analysis for high-count-rate semiconductor pixel detector readout

Negative and positive immittance function simulators and their applications

Parameter extraction of geometry dependent RF planar inductor model

Source-pull characterization of FinFET noise

Technology-portable mixed-signal sensing architecture for CMOS-integrated z-axis surface-micromachined accelerometers

Transconductance related analysis of EKV MOSFET model for a 0.35 µm CMOS technology node

Universal mixed-mode multi-loop video filter employing diamond transistors and buffers

Universal tool for estimation of programmable logic controllers processing power

Mocroe;ectronics technology and packaging

Distributed product engineering for microsystems devices

Design and technology of flip chip and SMD devices integrated with LTCC module

Measurement and performance evaluation of a silicon on insulator pixel matrix

Testing and reliability

Distributed approach for parallel exact critical path tracing fault simulation

Evaluation of power gating under transistor aging effect issues in 22nm CMOS technology

Logical fault modeling of source drain short defects for CMOS reversible circuits

Testing of interconnections with use of reduced-size signature-based diagnostic dictionary

Wavelet energy-based Mahalanobis distance metric for testing analog and mixed-signal circuits

Power electronics

A MOSFET only, step-up DC-DC micro power converter, for solar energy harvesting applications

Application optimization to search values of spurious elements of EMI filters

Energy saving by compensation of daylight deficiences in buildings

High-speed power system stability simulation using analog computation: Systematic error analysis

Preliminary characterization of automotive LED driver chip

Short-time energy buffering for photovoltaic system

Signal processing

A $3^{rd}$ order 1.5-bit continuous-time (CT) Sigma-Delta (ΣΔ) modulator optimized for Class D audio power amplifier

A dedicated high-level language for implementing nonrecursive filter banks and transforms

A quasi-equiripple design of IIR filters with unequal number of poles and zeros

Digital predistorter for 64QAM modulation based on FPGA device

Expandable GSM and GPS systems simulator

FPGA implementation of feature extraction algorithm for speaker verification

Integrated circuit for detection of acoustic emergency signals in road traffic

Measurement synchronization in the vibration diagnostic system of high power electric machines

Modeling and signal integrity testing of digital potentiometers

Power efficient hardware implementation of a fuzzy neural network

Processing of the image from infrared focal plane array using FPGA-based system

Uncertainty in iris recognition based on texture analysis

Embedded systems

Alvis approach to Hexor robot controller development

Embedded debugging for NoCs

Petri nets and Activity Diagrams in logic controller specification - transformation and verification

Scripting languages for simulations in modern SCADA systems

Medical applications

Design Methodology for synthetic biosystems

Image sensor - based fluorescence detection for microfluidical chips

Lab-on-a-chip for developmental competence assessment of bovine oocytes

Model of human palm controlled by glove with micromachined accelerometers

Parallel processing of statistical data using graphical processor for changeability evaluation of human voice parameters

Index of authors

2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems

2008 15th International Conference on Mixed Design of Integrated Circuits and Systems

2007 14th International Conference on Mixed Design of Integrated Circuits and Systems

Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.

Evaluation of power gating under transistor aging effect issues in 22nm CMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Luchuan Liu Mahmoodi, H.
Copyright Year	2010
Description	Author affiliation: School of Engineering, San Francisco State University, CA, USA (Luchuan Liu; Mahmoodi, H.)
Abstract	Power gating is an effective low-power design technique and is the most widely adopted leakage current reduction solution. In this project, we evaluate the effectiveness of power gating in 22 nm CMOS and analyze the impacts of the Positive/Negative Bias Temperature Instability (PBTI/NBTI) phenomenon on the power gating technique. We also estimate the actual temperatures of power gated circuits and simulate them under different temperatures. The results show that power gating can reduce the effect of PBTI/NBTI, effectively save power, and reduce temperature and delay in hospitable situations while it may not be a good choice in all cases.
Starting Page	477
Ending Page	481
File Size	301506
Page Count	5
File Format	PDF
ISBN	9781424470112
e-ISBN	9788392875642
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-06-24
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	DEPT OF MICROELECTRON
Subject Keyword	sleep delay Logic gates Aging temperature Leakage current power Transistors Reliability Power gating Delay Stress
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in