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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Rydygier, P. Dabrowski, W. Fiutowski, T. Wiacek, P. |
| Copyright Year | 2010 |
| Description | Author affiliation: Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, Kraków, Poland (Rydygier, P.; Dabrowski, W.; Fiutowski, T.; Wiacek, P.) |
| Abstract | In the paper we present the design and test results of an integrated circuit combining the sample&hold and the analogue multiplexer, which is foreseen to be implemented in a multi-channel Application Specific Integrated Circuit (ASIC) for recording signal from alive neuronal tissue. The design is optimised with respect to critical requirements for such circuits, i.e. short sampling time, low power dissipation, good linearity and high dynamic range. Presented design comprises sample&hold circuits with class AB operational amplifier, novel shift register, which allows minimising cross-coupling of the clock signal and control logic. The circuit has been designed in a 0.35 µm CMOS process and has been successfully implemented in a prototype multi-channel ASIC. |
| Starting Page | 283 |
| Ending Page | 288 |
| File Size | 4580574 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424470112 |
| e-ISBN | 9788392875642 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-06-24 |
| Publisher Place | Poland |
| Access Restriction | Subscribed |
| Rights Holder | DEPT OF MICROELECTRON |
| Subject Keyword | Multiplexing Operational amplifiers multi-channel electronics Capacitors low power amplifier Dynamic range Shift registers Capacitance multi-electrode arrays analogue multiplexer neural signals Clocks |
| Content Type | Text |
| Resource Type | Article |
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