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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Byk, E. Couturier, A.M. Camiade, M. Teyssandier, C. Hosch, M. Stieglauer, H. Fellon, P. |
| Copyright Year | 2012 |
| Description | Author affiliation: United Monolithic Semiconductors SAS, 10 avenue du Québec, 91140 Villebon-sur-Yvette, France (Byk, E.; Couturier, A.M.; Camiade, M.; Teyssandier, C.; Fellon, P.) || United Monolithic Semiconductors GmbH, Wilhelm Runge Strasse 11, 89081 Ulm, Germany (Hosch, M.; Stieglauer, H.) |
| Abstract | Design methodology and measurements of an E-band very low noise amplifier (LNA) are presented in this paper. This four stages MMIC is manufactured on UMS 4 inch 100 nm GaAs pHEMT technology with BCB coating. The chip size is 3.35 × 1.12 $mm^{2}.$ On-wafer measurements, close to simulation results, exhibit a gain of 22 dB associated to 4 dB noise figure in the 71–86 GHz frequency band (less than 3.5 dB in the 76–86 GHz sub-band). An output power of 10 dBm at 1 dB compression at maximum gain and 12 dB gain control dynamic range are also demonstrated in the entire frequency band by tuning the gate voltage from −3 to −2 V. To our knowledge, these performances are among the best reported up to now for an E-band LNA. |
| Starting Page | 111 |
| Ending Page | 114 |
| File Size | 529762 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467323024 |
| e-ISBN | 9782874870286 |
| e-ISBN | 9782874870262 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-10-29 |
| Publisher Place | Netherlands |
| Access Restriction | Subscribed |
| Rights Holder | European Microwave Assoc |
| Subject Keyword | Noise figure PHEMTs Noise Gallium arsenide Logic gates MMICs Gain |
| Content Type | Text |
| Resource Type | Article |
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