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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chih-Chung Hsu Hsien-Sen Chiu Rong-Yeu Chang |
| Copyright Year | 2012 |
| Description | Author affiliation: CoreTech System (Moldex3D) Co., Ltd., 8F-2, No.32, Taiyuan St., Chupei City, Hsinchu County, Taiwan 302, R.O.C. (Hsien-Sen Chiu) || Department of Chemical Engineering, National Tsing-Hua University, No. 101, Section 2, Kuang-Fu Road, Hsinchu, Taiwan 30013, R.O.C. (Chih-Chung Hsu; Rong-Yeu Chang) |
| Abstract | Semiconductor industry is the leader of industries in Taiwan for more than ten years. The development of microchip product is pretty complicated due to the complexity of material property while processing. Recently it becomes more arduous, because the trend of customer demand is driving the technology of IC packaging toward higher packaging densities with thinner and smaller profiles. Therefore, flip chips have recently gained popularity among manufacturers of many small electronics where the size savings are valuable. Especially, the short wires greatly reduce inductance, allowing higher-speed signals, and also carry heat better. However, fine pitch flip chip molding has difficulty meeting mechanical shock and prevention voids for underfill in on-site process. It becomes the most challenging in industry, so the conventional trial-and-error method is adopted previously to resolve these problems. Yet trial-and-error is difficult and costly because of the complex interactions among fluid flow, heat transfer, structural deformation and polymerization of the underfill. In this study, a 3D CAE simulation tool is proposed to accurately track the propagation of the underfill in microchips. The proposed methodology developed in this work accounts for most of the physical phenomena believed to play an important role in underfill flows. The results demonstrate not only show how an encapsulant fills an underfill gap, flowing around the bumps, but also simulate the interconnect area between a die and a substrate, and the area surrounding the die. The simulation results shows edge flow effect would help to pull the melt flow front in the bump array and formation of the fillet spread. By using the integrated analysis, molding defects can be easily detected and mold ability problems can be improved efficiently to reduce manufacturing cost and design cycle time. |
| Starting Page | 224 |
| Ending Page | 227 |
| File Size | 1274930 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467316354 |
| ISSN | 21505934 |
| e-ISBN | 9781467316385 |
| e-ISBN | 9781467316378 |
| DOI | 10.1109/IMPACT.2012.6420273 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-10-24 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Encapsulation Viscosity Heating Filling Surface tension Numerical models Flip chip |
| Content Type | Text |
| Resource Type | Article |
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