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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ming-Che Hsieh Chien Chen Lee Li Chiun Hung |
| Copyright Year | 2012 |
| Description | Author affiliation: STATS ChipPAC Taiwan Co., Ltd., No. 176-5, 6 Ling, Hualung Chun, Chiung Lin, Hsinchu 307, Taiwan (Ming-Che Hsieh; Chien Chen Lee; Li Chiun Hung) |
| Abstract | Because the utilization of copper column bump (with lead-free solder cap) interconnects performs the characteristic of fine pitch bump in flip chip technology (less than 150um bump pitch), supplies the flexibility of Cu column aspect ratio and efficiently increases the I/O density, lots of researches for Cu column bumps in flip chip packages are widely investigated. For the purpose of realizing the mechanical behaviors for fcFBGA (flip chip fine pitch BGA) with Cu column bumps, the three-dimensional finite element analysis (FEA) modeling has been used to obtain their warpage and stress responses. The reliability assessment for underfill selection is presented to validate the FEA results. Since the packaging geometry and material always plays the important role to affect mechanical behaviors, having the overall discussions to capture the critical factors that impact the stresses and warpage responses are useful to reduce the stress and warpage in fcFBGA. In order to gain the essential factors in fcFBGA, the systematic simulation studies for Cu column bumps are illustrated. The impact levels for top significant factors to influence the extreme low-k (ELK), under-bump-metallurgy (UBM) and bump stresses as well as the warpage are presented. The proposed results will be helpful not only for reducing warpage but also for keeping off the critical stresses in fcFBGA with Cu column bumps. It is believed that these results will be the design guidelines to enhance the package reliability and reduce the package costs during the development stage. |
| Starting Page | 280 |
| Ending Page | 283 |
| File Size | 2165508 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467316354 |
| ISSN | 21505934 |
| e-ISBN | 9781467316385 |
| e-ISBN | 9781467316378 |
| DOI | 10.1109/IMPACT.2012.6420243 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-10-24 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Packaging Electromagnetic compatibility Reliability Flip chip Stress Substrates |
| Content Type | Text |
| Resource Type | Article |
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