NDLI: Evaluation of interface strength between thin films fabricated on a silicon substrate for mixed mode of fracture

Content Provider	IEEE Xplore Digital Library
Author	Shibutani, T. Tsuruga, T. Qiang Yu Shiratori, M.
Copyright Year	2004
Description	Author affiliation: Yokohama Nat. Univ., Japan (Shibutani, T.; Tsuruga, T.; Qiang Yu; Shiratori, M.)
Abstract	Since electronic devices are made of multi-layered sub-micron films, delamination along the interface is one of the major failure mechanisms. This paper aims to develop a method for evaluating the mechanical criterion of interface cracking between thin films on a substrate. The focus is put on crack initiation from the edge of the interface where the stress concentrates due to the mismatch of deformation. For evaluating the interface fracture, specimens and loading systems were proposed. They are applied to sub-micron films (Si/sub 3/N/sub 4//Cu/TaN) on Si-substrate. A crack initiates at the edge of interface and the stress singularity field due to the mismatch of deformation between materials of films is dominant. On the basis of the fracture mechanics concept, the evaluated interface fracture toughness is 20 MPa/spl middot/m/sup /spl lambda// (/spl lambda/=0.07). It is independent of shapes of specimens and loading systems and characterizes the interface strength. The fracture mechanism can be classified into two types: opening mode and sliding mode. Corresponding with fracture modes, the fracture toughness varies. The interface fracture toughness of sliding mode is smaller than that of opening mode. The three-dimensional finite element analysis reveals that the structures of the corner on the interface causes the increasing of the shear stresses and affects the singularity field.
Sponsorship	Components, Packaging and Manufacturing Technol. Soc. of the Inst. of Elec. and Electron. Eng
Starting Page	192
Ending Page	198
File Size	354319
Page Count	7
File Format	PDF
ISBN	0780383575
DOI	10.1109/ITHERM.2004.1318282
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-06-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Semiconductor thin films Silicon Stress Large scale integration Conductive films Finite element methods Delamination Transistors Testing Copper
Content Type	Text
Resource Type	Article

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