NDLI: Mechanical Strength of Copper-Silicon Interface of Planar Metallization Power Modules

Content Provider	The American Society of Mechanical Engineers (ASME) Digital Collection
Author	Sinha, K. Dasgupta, A. Beaupre, R. Gowda, A.
Copyright Year	2008
Abstract	Planar metallization interconnection is an advanced approach to power module packaging. One advantage of this approach is the ability to interconnect a large number of small devices without wirebonds. The structure consists of multiple layers of dissimilar materials including, copper, kapton, silicon, direct bonded copper (DBC) and solder die attach. When subjected to power or thermal cycling, the difference in thermal expansion of the various layers causes interlaminar stresses and risk of delamination. In particular, potential high risk regions include the interface where plated copper vias make electrical connection to the silicon semiconductor device through thin adhesion and barrier metal films, because of the large CTE difference between them. This study examines the mechanical strength of this copper-silicon interface. The delamination mechanisms of a bimaterial interface can be classified into three types: opening mode, sliding mode, and twisting mode. The first two modes are explored in this study using specially designed experiments. The third mode does not contribute to thermo-mechanical stresses at the copper-silicon interface due to surrounding mechanical constraints and is not addressed. 3D finite element analysis of this via structure is combined with the above experimental results, to qualitatively assess the thermomechanical stress margins in a typical operating environment. Identification and understanding of these failure modes and mechanisms enables to better via designs for reliable operation of planar metallization power modules.
Starting Page	87
Ending Page	93
Page Count	7
File Format	PDF
ISBN	9780791848678
DOI	10.1115/IMECE2008-67367
e-ISBN	9780791838402
Volume Number	Volume 6: Electronics and Photonics
Conference Proceedings	ASME 2008 International Mechanical Engineering Congress and Exposition
Language	English
Publisher Date	2008-10-31
Publisher Place	Boston, Massachusetts, USA
Access Restriction	Subscribed
Subject Keyword	Degrees of freedom Solders Semiconductor devices Metals Risk Adhesion Stress Thermomechanics Strength (materials) Thermal expansion Packaging Silicon Finite element analysis Copper Delamination Failure mechanisms
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in