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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sharma, M. Benware, B. Lei Ling Abercrombie, D. Lee, L. Keim, M. Huaxing Tang Wu-Tung Cheng Ting-Pu Tai Yi-Jung Chang Lin, R. Man, A. |
| Copyright Year | 2008 |
| Description | Author affiliation: UMC, Hsinchu (Yi-Jung Chang; Lin, R.) || AMD Inc., Markham, ON (Man, A.) || Mentor Graphics Corp., Wilsonville, OR (Sharma, M.; Benware, B.; Lei Ling; Abercrombie, D.; Lee, L.; Keim, M.; Huaxing Tang; Wu-Tung Cheng; Ting-Pu Tai) |
| Abstract | Yield enhancements in the manufacturing process today require an expensive, long and tedious physical failure analysis process to identify the root cause. In this paper we present Axiom, a new technique geared towards efficiently identifying a single dominant defect mechanism (for example in an excursion wafer) by analyzing fail data collected from the production test environment. Axiom utilizes statistical hypothesis testing in a novel way to analyze logic diagnosis data along with information on physical features in the design layout and reliably identify the dominant cause for yield loss. This new methodology was validated by applying it to a single excursion wafer produced on a 90 nm process, in which the dominant failing physical feature was correctly identified. |
| Starting Page | 1 |
| Ending Page | 9 |
| File Size | 342251 |
| Page Count | 9 |
| File Format | |
| ISBN | 9781424424023 |
| ISSN | 10893539 |
| DOI | 10.1109/TEST.2008.4700589 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-10-28 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Performance evaluation Failure analysis Logic testing Manufacturing processes Production Data analysis Logic design History Fabrication Graphics |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Electrical and Electronic Engineering |
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