NDLI: RTL Error Diagnosis Using a Word-Level SAT-Solver

Content Provider	IEEE Xplore Digital Library
Author	Mirzaeian, S. Feijun Zheng Cheng, K.-T.T.
Copyright Year	2008
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA (Mirzaeian, S.; Cheng, K.-T.T.) \|\| Dept. of Electr. & Comput. Eng., Zhejiang Univ. (Feijun Zheng)
Abstract	We propose a novel methodology for design error diagnosis in the HDL description using a word-level solver. In this approach, the patterns that result in erroneous responses are first used to limit the number of initial error candidates. The RTL description of the design is then modified by adding one multiplexer to each of the possible error locations. For each of the erroneous pattern, the input pattern and the expected correct response are then imposed as constraints to the modified RTL model, resulting in a formula suitable for word-level satisfiability (SAT) solving. The solutions reported by the word-level SAT solver would indicate the potential error candidates. This constraint solving process iterates for each erroneous pattern, eventually resulting in a small set of error candidates. This method is sufficiently flexible to address both single-error and multiple-error diagnosis. We present experimental results for a set of public RTL benchmark designs to demonstrate the effectiveness of this proposed approach.
Starting Page	1
Ending Page	8
File Size	3176554
Page Count	8
File Format	PDF
ISBN	9781424424023
ISSN	10893539
DOI	10.1109/TEST.2008.4700568
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer errors Hardware design languages Error correction Multiplexing Circuit synthesis Design methodology Computer bugs Signal design Signal processing Design engineering
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering

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