NDLI: A Floating Gate MOSFET Based Current Reference with Subtraction Technique

Content Provider	IEEE Xplore Digital Library
Author	Babu, V.S. Haseena, P.S. Baiju, M.R.
Copyright Year	2010
Abstract	In this paper we propose a scheme for generating a reference current which can be implemented in the CMOS technology. The system performance is investigated for a range of supply voltages and temperature. The dependency of CMOS Current reference on supply voltage and temperature is compensated by simply subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is improved by the use of Floating Gate MOSFET. The work includes the mathematical modeling of the proposed current reference circuit and its verification by simulation using TANNAR EDA tools. The layout of the proposed circuit is also prepared. The circuit performance over temperature and supply voltage is better than the prior works in this area. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The current reference can operate down to 0.9V supply.
Starting Page	206
Ending Page	209
File Size	400577
Page Count	4
File Format	PDF
ISBN	9781424473212
e-ISBN	9781424473205
DOI	10.1109/ISVLSI.2010.52
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-07-05
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Temperature dependence MOSFET circuits CMOS integrated circuits Threshold voltage Temperature sensors Capacitance Supply voltage Independency Floating Gate MOSFET Current Reference Temperature Independency
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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