NDLI: Exploration of Migration and Replacement Policies for Dynamic NUCA over Tiled CMPs

Content Provider	IEEE Xplore Digital Library
Author	Das, Shirshendu Kapoor, Hemangee K.
Copyright Year	2015
Abstract	Multicore processors have proliferated several do-mains ranging from small scale embedded systems to large data-centers, making tiled CMPs (TCMP) the essential next generation scalable architecture. More processors need proportionally large cache to support the concurrent applications. NUCA architectures help in managing the capacity and access time for such larger cache designs. Static NUCA (SNUCA) has a fixed address mapping policy whereas dynamic NUCA (DNUCA) allows blocks to relocate nearer to the processing cores at runtime. The DNUCA architectures are well explored for systems with centralized cache banks and having processors along the periphery. SNUCA is well understood and explored for tiled CMPs whereas the same is not the case for DNUCA. Towards exploring various implementations of DNUCA for tiled CMPs, this paper presents an architecture along with migration and replacement policies for tiled CMPs. Experimental results show improvements with respect to TCMP based SNUCA. We discuss the differences and challenges of TCMP based DNUCA compared to original DNUCA, and present results for different configurations of migration and replacement policies. Simulation results shows improvements over TCMP based SNUCA by 44.7% and 9.6% in terms of miss-rate and cycles per instruction (CPI) respectively.
Starting Page	141
Ending Page	146
File Size	516083
Page Count	6
File Format	PDF
ISBN	9781479966585
ISSN	10639667
DOI	10.1109/VLSID.2015.29
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-03
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Block migration CMP Last Level Cache NUCA Tiled-CMP Dynamic NUCA
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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