NDLI: Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications

Content Provider	IEEE Xplore Digital Library
Author	Maity, A. Patra, A. Yamamura, N. Knight, J.
Copyright Year	2011
Abstract	This paper presents the design and implementation of a 20 MHz voltage mode DC-DC buck converter with high power efficiency. The power efficiency has been improved by minimising the short circuit current in the driver stage. At the same time, a high gain, wide-band error amplifier topology with reduced current consumption, improves various dynamic performance parameters such as settling time, load and line regulations of the converter. A prototype of a 20 MHz DCDC buck converter is implemented and fabricated in 0.5 ?m Bi-CMOS process with a maximum of 600 mA load current driving capability in the input voltage range of 2.7-5.5 V which is suitable for single-cell lithiumion (Li-Ion) battery operated portable applications. A reasonably good settling time of 10 ?s is observed in the measured result with off-chip filter components of L=270 nH, C=1.6 ?F. The measured value of load regulation and line regulation are 1.6 mV/A and 3 mV/V respectively. A maximum of 84% power efficiency is achieved at 2.7 V to 1.2 V conversion. A very low form factor of 2.5 mm× 2.5 mm× 0.7 mm, has been achieved by using power power flip-chip packaging technology.
Starting Page	316
Ending Page	321
File Size	778698
Page Count	6
File Format	PDF
ISBN	9781612843278
ISSN	10639667
DOI	10.1109/VLSID.2011.37
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-02
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Converters Topology Capacitors Driver circuits Logic gates Switches Delay
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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