NDLI: Improving Android Performance and Energy Efficiency

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Table of Contents

Message from the General Chairs

Message from the Program Chairs

Conference Steering Committee

Conference Committee

Reviewers: Track Chairs and Sub-committee Members -- VLSI 2011

Reviewers - VLSI 2011

VLSI Design 2010 -- Best Paper Awards

VLSI Design Conference History

Embedded Systems Design Conference History

VLSI Design 2011 Keynote Speakers

4×2Gbps Source-Synchronous Transmitter in 45nm CMOS

Self-Calibrating Equalizer for Optimal Jitter Performance Using On-chip Eye Monitoring

A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture

An Approach to Tolerate Process Related Variations in Memristor-Based Applications

A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection

Power Scalable Digital Baseband Architecture for IEEE 802.15.4

Evolution of Oscillation in a Quadrature Oscillator

Quadrature Error Compensation for Jitter Reduction in High Speed Clock and Data Recovery Circuits

A 1.8GHz Digital PLL in 65nm CMOS

Auxiliary State Machines and Auxiliary Functions: Constructs for Extending AMS Assertions

Variation-Conscious Formal Timing Verification in RTL

A Novel Learning Framework for State Space Exploration Based on Search State Extensibility Relation

Improved Timing Windows Overlap Check Using Statistical Timing Analysis

An Automated Approach for Minimum Jitter Buffered H-Tree Construction

Interconnected Tile Standing Wave Resonant Oscillator Based Clock Distribution Circuits

A SPICE Macromodel for the Analysis of Lossy Dispersive Coupled GaAs Interconnect Line System

Statistical Simulation and Modeling of Nano-scale CMOS VCO Using Artificial Neural Network

A Methodology for Automatic Transistor-Level Sizing of CMOS OpAmps

A Statistical Learning Based Modeling Approach and Its Application in Leakage Library Characterization

Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations

Accurate Estimation of Signal Currents for Reliability Analysis Considering Advanced Waveform-Shape Effects

Pseudo Concurrent Quad-Band LNA Operating in 900 MHz/1.8 GHz and 900 MHz/2.4 GHz Bands for Multi-standard Wireless Receiver

Extraction of Aspect Ratio for Non-Manhattan CMOS Devices

A Highly Stable Leakage-Based Silicon Physical Unclonable Functions

Realizing Cycle Accurate Processor Memory Simulation via Interface Abstraction

AcENoCs: A Configurable HW/SW Platform for FPGA Accelerated NoC Emulation

A Library Development Framework for a Coarse Grain Reconfigurable Architecture

A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization

Automated Physical Design of Microchip-Based Capillary Electrophoresis Systems

Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip

Dual Code Compression for Embedded Systems

A Scalable LDPC Decoder on GPU

Self-Immunity Technique to Improve Register File Integrity Against Soft Errors

Modeling the Effect of Gate Fringing and Dopant Redistribution on the Inverse Narrow Width Effect of Narrow Channel Shallow Trench Isolated MOSFETs

Development of a Micro-mechanical Logic Inverter for Low Frequency MEMS Sensor Interfacing

Performance Comparison of Thin-Film Transistors Fabricated Using Different Purity Semiconducting Nanotubes

Feedback Based Supply Voltage Control for Temperature Variation Tolerant PUFs

Ensuring On-Die Power Supply Robustness in High-Performance Designs

A Reconfigurable Processor for Phylogenetic Inference

NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture

Intra-Flit Skew Reduction for Asynchronous Bypass Channel in NoCs

Low Power Asynchronous Data Acquisition Front End for Wireless Body Sensor Area Network

Hardware Implementation of Real-Time Speech Recognition System Using TMS320C6713 DSP

Improving Android Performance and Energy Efficiency

Hazard-Aware Directed Transition Fault ATPG for Effective Critical Path Test

Fault Collapsing Using a Novel Extensibility Relation

Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter Estimation

A Robust and Reconfigurable Multi-mode Power Gating Architecture

MEMS-Based Power Gating for Highly Scalable Periodic and Event-Driven Processing

True Minimum Energy Design Using Dual Below-Threshold Supply Voltages

LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches

Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage Optimization

VaROT: Methodology for Variation-Tolerant DSP Hardware Design Using Post-Silicon Truncation of Operand Width

Design of a 20 MHz DC-DC Buck Converter with 84 Percent Efficiency for Portable Applications

Low Offset, Low Noise, Variable Gain Interfacing Circuit with a Novel Scheme for Sensor Sensitivity and Offset Compensation for MEMS Based, Wheatstone Bridge Type, Resistive Smart Sensor

A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology

A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking Systems

Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters

Trading Accuracy for Power with an Underdesigned Multiplier Architecture

Efficient Trace Signal Selection for Post Silicon Validation and Debug

Trace Buffer-Based Silicon Debug with Lossless Compression

Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization

Multi-CoDec Configurations for Low Power and High Quality Scan Test

Thermal-Aware Test Scheduling Using On-chip Temperature Sensors

Path Delay Tuning for Performance Gain in the Face of Random Manufacturing Variations

Publisher Information

2010 23rd International Conference on VLSI Design

2009 22nd International Conference on VLSI Design

21st International Conference on VLSI Design (VLSID 2008)

20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06)

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design

17th International Conference on VLSI Design. Proceedings.

16th International Conference on VLSI Design, 2003. Proceedings.

VLSI Design 2001. Fourteenth International Conference on VLSI Design

VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)

Proceedings Eleventh International Conference on VLSI Design

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The Sixth International Conference on VLSI Design

The Fifth International Conference on VLSI Design

Improving Android Performance and Energy Efficiency

Content Provider	IEEE Xplore Digital Library
Author	Kundu, T.K. Paul, K.
Copyright Year	2011
Abstract	Mobile devices and embedded devices need more processing power but energy consumption should be less to save battery power. Google has released an open source platform Android for mobile devices. Android uses new power management framework to save power in mobile devices. Android developers are allowed to build only JAVA applications. In this work, we present benefits of using Android in low power embedded devices. We compared Android JAVA performance with popular Sun embedded JVM running on top of Angstrom linux. Our work shows that Android can be made more energy efficient by improving performance of JAVA applications. We developed a JAVA DSP framework which allows Android JAVA applications to use both ARM & DSP parallely and thus improves performance. We also showed, Android can be made more energy efficient by using our developed framework.
Starting Page	256
Ending Page	261
File Size	780540
Page Count	6
File Format	PDF
ISBN	9781612843278
ISSN	10639667
DOI	10.1109/VLSID.2011.63
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-01-02
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Pixel Very large scale integration
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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