NDLI: Applicability of general purpose processors to network applications

Content Provider	IEEE Xplore Digital Library
Author	Durbhakula, M.
Copyright Year	2005
Description	Author affiliation: Mentor Graphics, India (Durbhakula, M.)
Abstract	In this paper we look at the applicability of some of the features commonly found in general-purpose processors to network applications. Specifically we evaluate the benefit of in-order vs. out-of-order instruction issue, multiple issue, and subword parallelism. We find that issuing instructions out-of-order improves instructions-per-cycle (IPC) performance by 96% over issuing instructions in-order. We also find that CPU performance does not scale linearly with issue width. A 2-way issue out-of-order processor is probably a better choice than a 4-way or 8-way issue processor. We find there is a good amount of subword level parallelism in network applications. We evaluate the benefits of a hardware solution to exploit this parallelism. This does not require any support from the compiler/programmer, and leads to an improvement of 13% in IPC. It also saves energy in integer register file by 39%. Combining all three mechanisms leads to an improvement of 89% in IPC compared to a 4-way issue in-order processor.
Starting Page	832
Ending Page	835
File Size	89339
Page Count	4
File Format	PDF
ISBN	0769522645
ISSN	10639667
DOI	10.1109/ICVD.2005.53
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-01-03
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Embedded system
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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