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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Blanton, S. Mitra, S. |
| Copyright Year | 2005 |
| Description | Author affiliation: Carnegie Mellon Univ., Pittsburgh, PA, USA (Blanton, S.) |
| Abstract | High-test quality plays a central role in the development of successful products used for building robust computing and communication systems. Hence, high-test quality enablers are rapidly becoming "features", just like performance, power-consumption and die size. This tutorial includes in-depth discussions on two major test topics that are essential for designs manufactured in nanometer technologies: test compression and diagnosis. Test compression techniques enable orders of magnitude improvement (reduction) in test cost and pave the path for successful implementation of built-in-self-test features. Ensuring products yield with sufficient quality also requires techniques for identifying and characterizing defects. This tutorial describes state-of-the-art techniques for performing defect diagnosis and how such techniques are key in enabling high-yielding and high-quality products. Supporting data from actual designs and manufacturing processes are presented. |
| Starting Page | 8 |
| Ending Page | 9 |
| File Size | 34328 |
| Page Count | 2 |
| File Format | |
| ISBN | 0769522645 |
| ISSN | 10639667 |
| DOI | 10.1109/ICVD.2005.162 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-01-03 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit testing Integrated circuit testing Digital integrated circuits Roads System testing Micromechanical devices Very large scale integration Robustness Manufacturing Automatic testing |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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