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Content Provider | IEEE Xplore Digital Library |
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Author | Lin, Y.C. Lai, C.S. Chung, S.S. Yang, E. Pittikoun, S. Tzeng, S.-M. Hsu, C.C.-H. |
Copyright Year | 2005 |
Abstract | For the first time, a new flash cell, called buried bit-line AND (BiAND), is proposed. Buried bit-line AND flash can achieve low voltage programming/erase. The major difference of the current flash cell from the conventional AND flash is the special design of a bit-line contact. With the use of the buried bit-line, the required high program/erase voltage for FN tunneling can be divided between the word-line and bit-line such that lower voltage operation is feasible. Further, the comparison of the cell reliability for different schemes, i.e., high voltage F-N (HV F-N) and Bi F-N operating schemes, has been studied. Results show that the BiAND scheme gives much better endurance and data retention characteristics. This makes it successful for a low voltage and high reliability design. |
Sponsorship | IEEE Electron Devices Soc. IEEE Reliability Soc |
Starting Page | 666 |
Ending Page | 667 |
File Size | 423375 |
Page Count | 2 |
File Format | |
ISBN | 0780388038 |
DOI | 10.1109/RELPHY.2005.1493195 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2005-04-17 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Flash memory Low voltage Bismuth Reliability engineering Power engineering and energy Tunneling Nonvolatile memory Plugs Electrons Temperature |
Content Type | Text |
Resource Type | Article |
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