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Content Provider | IEEE Xplore Digital Library |
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Author | Hefyene, N. Anghel, C. Gillon, R. Ionescu, A.M. |
Copyright Year | 2005 |
Description | Author affiliation: Swiss Fed. Inst. of Technol., Lausanne, Switzerland (Hefyene, N.; Anghel, C.) |
Abstract | This paper reports on an experimental evaluation of the hot-carrier impact on capacitances of high voltage DMOS transistors and their correlation with the degradation of DC characteristics. Two stress conditions were selected: (i) stress-A: at maximum drain voltage (near breakdown) and a gate voltage providing maximum body-current, I/sub Bmax/, and; (ii) stress-B: at maximum drain and gate voltages, which are the most relevant for device reliability. The proposed investigations experimentally distinguish among drift-region degradation, for stress-A, and gate oxide degradation near the source-end, for stress-B. In the case of stress-B, while traditional DC evaluation of stress impact suggests a significant shift in the DC parameters, the DMOS AC characteristics appear considerably altered. This suggests the importance of the systematic experimental evaluation of the impact of hot-carrier degradation of AC characteristics and its correlation with DC degradation in order to explain the degradation mechanisms. |
Sponsorship | IEEE Electron Devices Soc. IEEE Reliability Soc |
Starting Page | 551 |
Ending Page | 554 |
File Size | 718247 |
Page Count | 4 |
File Format | |
ISBN | 0780388038 |
DOI | 10.1109/RELPHY.2005.1493146 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2005-04-17 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Hot carriers Degradation Breakdown voltage Stress CMOS technology Scattering parameters Switches Testing Capacitance measurement Semiconductor device reliability |
Content Type | Text |
Resource Type | Article |
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