NDLI: FPGA implementation of a real-time image tracking system

Content Provider	IEEE Xplore Digital Library
Author	Yuan-Pao Hsu Hsiao-Chun Miao Ching-Chih Tsai
Copyright Year	2010
Description	Author affiliation: Department of CSIE, National Formosa University, Yunlin, Taiwan (Yuan-Pao Hsu; Hsiao-Chun Miao) \|\| Department of EE, National Chung Hsing University, Taichung, Taiwan (Ching-Chih Tsai)
Abstract	This article focuses on realizing an object tracking and image capture system on a FPGA. The system processes each picture with size of 640×480 pixels which is coming from input image data captured by an external CCD camera. Firstly, the RGB format of input image data is transformed to HSV format through color space transformation. Secondly, the value (also called intensity) of HSV format image is adjusted by the histogram equalization process to enhance the image brightness. Thirdly, skin color detection and binarization process is employed on the resulting HSV image. Fourthly, the system dilates the binary image to make up the flaws on the image. Finally, the image is checked to determine if there is any possible skin color area which its horizontal width is larger than a threshold. If so, then the area is qualified to be a suspected object and the surveillance system controls a 2-dimentional rotation machinery to track the object. Meanwhile, the captured object image is synchronously displayed on a VGA screen and saved into a SD card. Designed under hardware and software co-design methodology, the resulting system has been experimentally proved that it satisfies the goal of real-time detecting and tracking of suspected objects.
Starting Page	2878
Ending Page	2884
File Size	384713
Page Count	7
File Format	PDF
ISBN	9781424476428
e-ISBN	9784907764364
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-18
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	SICE
Subject Keyword	Image color analysis Pixel Charge coupled devices Image segmentation Hardware Cameras object tracking FPGA image process
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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