NDLI: Transceiver design for the bus driver of the FlexRay communication system

Content Provider	IEEE Xplore Digital Library
Author	Shi-Hao Zheng Zhi-Ming Lin Der-Cherng Liaw
Copyright Year	2010
Description	Author affiliation: Graduate Institute of Integrated, Circuit Design, National Changhua, University of Education, NCUE, Changhua, Taiwan 500, ROC (Shi-Hao Zheng; Zhi-Ming Lin) \|\| Department of Electrical ngineering, National Chiao Tung University, Hsinchu, Taiwan 300, ROC (Der-Cherng Liaw)
Abstract	This paper will introduce a designed transceiver of a bus driver for the physical layer of the FlexRay communication used in an X-by-Wire vehicle electronic System. The work includes three major parts. First, we design the finite state machine subject to the FlexRay specifications for the external input/output signals and the internal signals connecting each sub-circuit. Second, we design the transmitter with the capability of differentially transmitting binary data stream. Third, we design the receiver that not only can receive binary data stream, but also can filter out noise and distinguish the signal level. The simulation results of the whole circuit confirm the functionality of the designed transceiver based on the TSMC 0.35μm 2P4M mixed-signal CMOS process. For 10 MBit/s data rate, ±1.2V transmitting voltages and 45 Ω equivalent bus resistance, the load and the transceiver dissipate 32mW and 204mW power, respectively.
Starting Page	3625
Ending Page	3630
File Size	513480
Page Count	6
File Format	PDF
ISBN	9781424476428
e-ISBN	9784907764364
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-18
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	SICE
Subject Keyword	Receivers Transmitters Driver circuits Transceivers Simulation Delay transceiver FlexRay communications systems bus driver
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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