NDLI: Multilayer Coplanar Waveguide Transmission Lines Compatible with Standard Digital Silicon Technologies

Content Provider	IEEE Xplore Digital Library
Author	Yunliang Zhu Shang Wang Hui Wu
Copyright Year	2007
Description	Author affiliation: Univ. of Rochester, Rochester (Yunliang Zhu; Shang Wang; Hui Wu)
Abstract	On-chip transmission lines in silicon technologies suffer from the low-resistivity substrate and geometry limitations imposed by layout and metal density design rules. In this paper, we demonstrate that multilayer coplanar waveguide (MCPW) transmission lines can be utilized to overcome both problems by taking advantage of multiple metal layers available. We studied the effects of ground spacing on MCPW characteristics using electromagnetic simulations, based on process parameters from a 0.18 mum standard digital CMOS technology with 0.01 Omega-cm P+ substrate. Simulation results show that by adjusting the ground spacing, we can control the characteristics impedance, effective dielectric constant, and attenuation of MCPW lines. A test chip was designed and fabricated with MCPW, regular CPW, and microstrip lines. Measurement results verified the analysis and simulation results.
Starting Page	1567
Ending Page	1570
File Size	2668105
Page Count	4
File Format	PDF
ISBN	1424406870
ISSN	0149645X
DOI	10.1109/MWSYM.2007.380574
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Nonhomogeneous media Coplanar waveguides Coplanar transmission lines Silicon Electromagnetic waveguides CMOS technology Geometry CMOS process Dielectric substrates Impedance
Content Type	Text
Resource Type	Article
Subject	Condensed Matter Physics Electrical and Electronic Engineering Radiation

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