NDLI: The effect of band gap engineering of the nitride storage node on performance and reliability of charge trap flash

Content Provider	IEEE Xplore Digital Library
Author	Sandhya, C. Ganguly, U. Singh, K.K. Olsen, C. Seutter, S.M. Conti, G. Ahmed, K. Krishna, N. Vasi, J. Mahapatra, S.
Copyright Year	2008
Description	Author affiliation: Dept. of EE, IIT Bombay, Mumbai (Sandhya, C.)
Abstract	The effect of nitride composition, i.e. Si-rich $(Si^{+})$ and N-rich $(N^{+})$ nitride bi-layers separated by an oxynitride (SiON) layer on memory performance and reliability is studied. Bottom $Si^{+}$ layer and top $N^{+}$ forms the $Si^{+}/N^{+}$ bi-layer that is compared to the opposite configuration of $N^{+}/Si^{+}$ bi-layer to reveal large impact on memory performance and reliability. $Si^{+}/N^{+}$ bi-layers exhibit superior P/E windows and endurance characteristics but worse retention charge loss compared to $N^{+}/Si^{+}$ stacks. The oxynitride layer composition and position play a dominant role in trap generation as evident from endurance performance. A low energy-threshold degradation mechanism with higher degradation of the SiON layer with greater H-content is observed. A Si-H bond breaking mechanism is proposed as trap generation mechanism during endurance cycling. Retention is primarily bottom nitride composition dependent as tunnel oxide is shown to be the dominant charge loss path.
Starting Page	1
Ending Page	7
File Size	240854
Page Count	7
File Format	PDF
ISBN	9781424420391
DOI	10.1109/IPFA.2008.4588192
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-07-07
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Logic gates Transient analysis Charge carrier processes SONOS devices Reliability Photonic band gap
Content Type	Text
Resource Type	Article

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