NDLI: Evaluation of CdS nanostructures for application to low environmental-load CdS/CdTe solar cells

Content Provider	IEEE Xplore Digital Library
Author	Toyama, T. Oda, H. Matsune, K. Okamoto, H.
Copyright Year	2003
Description	Author affiliation: Dept. of Syst. Innovation, Osaka Univ., Japan (Toyama, T.; Oda, H.; Matsune, K.; Okamoto, H.)
Abstract	The low "environmental-load" CdS/CdTe solar cells for reducing consumption of Cd compounds have been investigated employing the CdS layers fabricated at various substrate temperatures, T/sub CdS/. The nanostructure of CdS crystallites made at different T/sub CdS/ are compared to the crystallinity of CdS, and CdTe deposited on CdS as well as sulfur fraction in CdTe/sub 1-x/S/sub x/ mixed crystal layer unintentionally formed at CdS-CdTe(S) interface. To obtain relative high V/sub oc/, high crystallinity is required for CdS, while to prevent the degradation of CdS/CdTe(S) interface for keeping high FF, rather CdS with low crystallinity is suitable. To break the contradictional requirements for CdS crystallinity, a novel technique is introduced, i.e., (CH/sub 3/)/sub 2/SnCl/sub 2/ (DMTC) doping into CdS. The large sulfur fraction in CdTe/sub 1-x/S/sub x/ mixed crystal layer being a degree of the CdS/CdTe(S) interface is obtained in the solar cell employing the CdS layer doped with DMTC even when the DMTC-doped CdS layer obtains high crystallinity. So far, we have achieved 14.8% efficiency of the low environmental-load CdS/CdTe solar cell.
Starting Page	511
Ending Page	514
File Size	305841
Page Count	4
File Format	PDF
ISBN	4990181603
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-05-11
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	PVSEC Advisory Committee
Subject Keyword	Photovoltaic cells Crystallization Photovoltaic systems Solar power generation Temperature Doping Annealing Energy conversion Transistors Fabrication
Content Type	Text
Resource Type	Article

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