NDLI: High level synthesis of stereo matching: Productivity, performance, and software constraints

Content Provider	IEEE Xplore Digital Library
Author	Rupnow, K. Yun Liang Yinan Li Dongbo Min Minh Do Deming Chen
Copyright Year	2011
Description	Author affiliation: Advanced Digital Sciences Center (Rupnow, K.; Yun Liang; Yinan Li; Dongbo Min) \|\| University of Illinois at Urbana-Champaign (Minh Do; Deming Chen)
Abstract	FPGAs are an attractive platform for applications with high computation demand and low energy consumption requirements. However, design effort for FPGA implementations remains high — often an order of magnitude larger than design effort using high level languages. Instead of this time-consuming process, high level synthesis (HLS) tools generate hardware implementations from high level languages (HLL) such as C/C++/SystemC. Such tools reduce design effort: high level descriptions are more compact and less error prone. HLS tools promise hardware development abstracted from software designer knowledge of the implementation platform. In this paper, we examine several implementations of stereo matching, an active area of computer vision research that uses techniques also common for image de-noising, image retrieval, feature matching and face recognition. We present an unbiased evaluation of the suitability of using HLS for typical stereo matching software, usability and productivity of AutoPilot (a state of the art HLS tool), and the performance of designs produced by AutoPilot. Based on our study, we provide guidelines for software design, limitations of mapping general purpose software to hardware using HLS, and future directions for HLS tool development. For the stereo matching algorithms, we demonstrate between 3.5X and 67.9X speedup over software (but less than achievable by manual RTL design) with a five-fold reduction in design effort vs. manual hardware design.
Starting Page	1
Ending Page	8
File Size	560887
Page Count	8
File Format	PDF
ISBN	9781457717413
e-ISBN	9781457717406
DOI	10.1109/FPT.2011.6132716
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-12
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Arrays Software Optimization Hardware Stereo vision Software algorithms Pipeline processing
Content Type	Text
Resource Type	Article

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