NDLI: Synthesis of parallel binary machines

Content Provider	IEEE Xplore Digital Library
Author	Dubrova, E.
Copyright Year	2011
Description	Author affiliation: Royal Institute of Technology, IMIT/KTH, 164 40 Kista, Sweden (Dubrova, E.)
Abstract	Binary machines are a generalization of Feedback Shift Registers (FSRs) in which both, feedback and feedforward, connections are allowed and no chain connection between the register stages is required. In this paper, we present an algorithm for synthesis of binary machines with the minimum number of stages for a given degree of parallelization. Our experimental results show that for sequences with high linear complexity such as complementary, Legendre, or truly random, parallel binary machines are an order of magnitude smaller than parallel FSRs generating the same sequence. The presented approach can potentially be of advantage for many applications including wireless communication, cryptography, and testing.
Starting Page	200
Ending Page	206
File Size	400500
Page Count	7
File Format	PDF
ISBN	9781457713996
ISSN	10923152
e-ISBN	9781457714009
e-ISBN	9781457713989
DOI	10.1109/ICCAD.2011.6105326
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Encoding Clocks Nickel Bismuth Registers Complexity theory Manganese
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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