NDLI: Novel wire density driven full-chip routing for CMP variation control

Content Provider	IEEE Xplore Digital Library
Author	Huang-Yu Chen Szu-Jui Chou Sheng-Lung Wang Yao-Wen Changt
Copyright Year	2007
Description	Author affiliation: Nat. Taiwan Univ., Taipei (Huang-Yu Chen; Szu-Jui Chou)
Abstract	As nanometer technology advances, the post-CMP dielectric thickness variation control becomes crucial for manufacturing closure. To improve CMP quality, dummy feature filling is typically performed by foundries after the routing stage. However, tilling dummy features may greatly degrade the interconnect performance and lead to explosion of mask data. It is thus desirable to consider wire-density uniformity during routing to minimize the side effects from aggressive post-layout dummy filling. In this paper, we present a new full-chip grid-based routing system considering wire density for reticle planarization enhancement. To fully consider wire distribution, the router applies a novel two-pass, top-down planarity-driven routing framework, which employs a new density critical area analysis based on Voronoi diagrams and incorporates an intermediate stage of density-driven layer/track assignment based on incremental Delaunay triangulation. Experimental results show that our methods can achieve more balanced wire distribution than state-of-the-art works.
Starting Page	831
Ending Page	838
File Size	2611680
Page Count	8
File Format	PDF
ISBN	9781424413812
ISSN	10923152
DOI	10.1109/ICCAD.2007.4397368
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-11-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wire Routing Filling Dielectrics Thickness control Manufacturing Foundries Degradation Explosions Planarization
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control

Novel wire density driven full-chip routing for CMP variation control

Novel wire density driven full-chip routing for CMP variation control (2007)

Novel wire density driven full-chip routing for cmp variation control ∗.

A novel wire-density-driven full-chip routing system for cmp variation control.

A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control

Wire density driven global routing for CMP variation and timing

Wire Density Driven Global Routing for CMP Variation and Timing

Metal-Density-Driven Placement for CMP Variation and Routability

Novel wire density driven full-chip routing for CMP variation control

Similar Documents

A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control

Novel wire density driven full-chip routing for CMP variation control

Novel wire density driven full-chip routing for CMP variation control (2007)

Novel wire density driven full-chip routing for cmp variation control ∗.

A novel wire-density-driven full-chip routing system for cmp variation control.

A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control

Wire density driven global routing for CMP variation and timing

Wire Density Driven Global Routing for CMP Variation and Timing

Metal-Density-Driven Placement for CMP Variation and Routability

Novel wire density driven full-chip routing for CMP variation control