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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chen, G.K. Blaauw, D. Mudge, T. Sylvester, D. Nam Sung Kim |
| Copyright Year | 2007 |
| Description | Author affiliation: Michigan Univ., Ann Arbor (Chen, G.K.; Blaauw, D.; Mudge, T.; Sylvester, D.) |
| Abstract | Voltage scaling is desirable in SRAM to reduce energy consumption. However, commercial SRAM is prone to functional failures when $V_{dd}$ is scaled. Several SRAM designs scale $V_{dd}$ to 200-300 mV to minimize energy per access, but these designs do not consider SRAM robustness, limiting them to small arrays and sensor type applications. We examine the effects on area and energy for a differential 6 T, single-ended 6 T with power rail collapsing and an 8 T bitcell as $V_{dd}$ is scaled and the bitcells are sized appropriately to maintain robustness. SRAM robustness is examined using importance sampling to reduce simulation runtime. At high voltages, the differential 6T bitcell is the smallest for the same failure rate, but the 8 T bitcell is smaller when $V_{dd}$ is scaled below 450 mV. For $V_{dd}$ below $V_{th},$ bitcells must be sized greatly to retain robustness and large arrays become impractical. The differential 6 T and 8 T designs have the lowest dynamic energy consumption, and the single-ended 6 T design has the lowest leakage. The supply voltage for minimum energy operation depends on cache configuration and can be well above $V_{th}$ for large caches with low dynamic activity. |
| Starting Page | 660 |
| Ending Page | 666 |
| File Size | 1040675 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781424413812 |
| ISSN | 10923152 |
| DOI | 10.1109/ICCAD.2007.4397341 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-11-04 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Random access memory Robustness Delay Sensor arrays Energy consumption Monte Carlo methods Dynamic voltage scaling Noise reduction Microprocessors Rails |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Computer Science Applications Software |
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