NDLI: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays

Content Provider	IEEE Xplore Digital Library
Author	Ben Jamaa, M.H. Moselund, K.E. Atienza, D. Bouvet, D. Ionescu, A.M. Leblebici, Y. De Micheli, G.
Copyright Year	2007
Description	Author affiliation: Integrated Syst. Lab. (LSI), Lausanne (Ben Jamaa, M.H.)
Abstract	Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we suggest a way to reduce the decoder size and keep it defect tolerant by using multiple threshold voltages (V $_{T}),$ which is enabled by our underlying technology. We define two types of multi-valued decoders and model the defects they undergo due to the V $_{T}$ variation. Multi-valued hot decoders yield better area saving than n-ary reflexive codes (NRC), and under severe conditions, NRC enables a non-vanishing part of the code space to recover. There are many combinations of decoder type and number of V $_{T}'s$ yielding equal effective memory capacities. The optimal choice saves area up to 24%. We also show that the precision of the addressing voltages for decoders with unreliable V $_{T}'s$ is a crucial parameter for the decoder design and permits large savings in memory area.
Starting Page	765
Ending Page	772
File Size	1036551
Page Count	8
File Format	PDF
ISBN	9781424413812
ISSN	10923152
DOI	10.1109/ICCAD.2007.4397358
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-11-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic arrays Fault tolerance Decoding Nanowires Circuits Silicon on insulator technology Double-gate FETs Laboratories CMOS technology Switches
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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