NDLI: Elimination of integrated circuit bond pad crater test over rejection

Content Provider	IEEE Xplore Digital Library
Author	Balabbo, R. Picardal, M.
Copyright Year	2012
Description	Author affiliation: ON Semicond. Philippines Inc., Cavite, Philippines (Balabbo, R.; Picardal, M.)
Abstract	Wirebond interconnect reliability in integrated circuit, IC, chip is one of the key characteristic for the IC's performance during its function. One of the common and known interconnect reliability failures is cratering or the Wirebonding or Probing process related damage in bond pad surface and underlying material. This study determined that cratering is not only Wirebond or Probe process induced. Cratering can also be induced by the chemical test preparation, the etching process. Samples for pad cratering test are pulled out after Wirebond. To determine if there is damage in the pad, the wire-pad intermetallic is etched. The complete etching process shows the ball bond lifting and then revealing the pad surface. If not optimized, the etching process in the extreme side or over etch will shift the stress in the pad as the wire lifts. This mean a portion of the pad peels off with the wire resulting to pad damage. This phenomenon was validated in a screening design of experiment, DOE covering temperature before etch start, amount of etching chemicals, volume of samples, and etch time as key input variables. Temperature before etch start was the significant factor at 95% confidence level and was optimized. To avoid over etch; the process should start at 40 degrees Celsius. The cratering test procedure was revised and since then bond pad crater test over rejection was eliminated.
Starting Page	1
Ending Page	5
File Size	1432117
Page Count	5
File Format	PDF
ISBN	9781467343848
ISSN	10898190
e-ISBN	9781467343862
DOI	10.1109/IEMT.2012.6521794
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-11-06
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electrical and Electronic Engineering

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Numerical & experimental analysis of bond pad stack structure for wire bond interconnection

Cu bonding development & challenges on NiPd bond pad

Pad bending improvement on copper wire bonding on NiP/Pd/Au bond pad

Investigation of bond pad etching chemistries for passivation crack

Use of Harsh Wafer Probing to Evaluate Traditional and CUP Bond Pad Structures

Fully process-compatible layout design on bond pad to improve wire bond reliability in CMOS ICs

IC performance prediction for test cost reduction

Electrical test strategies for a wafer-level packaging technology

Improving manufacturing performance at the Rochester Institute of Technology integrated circuit factory

Elimination of integrated circuit bond pad crater test over rejection

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