NDLI: The development and reliability of small pitch flip chip on flex process

Content Provider	IEEE Xplore Digital Library
Author	Palm, P. Maattanen, J. Tuominen, A. Jalonen, P.
Copyright Year	2001
Description	Author affiliation: Elcoteq Network Corp., Helsinki, Finland (Palm, P.)
Abstract	In the portable electronics product business, there is a strong trend towards miniaturization. At the same time, when the size and the weight of these products are decreasing, the number of functions and the performance is increasing. This trend towards miniaturization means that the packaging density is increasing significantly. The target of our research was to develop a small pitch flip chip on flex process for electronic module applications. This paper presents the results from the reliability tests of different types of flexible substrates and different types of anisotropically conductive adhesives in high-density flip chip application. The reliability of the samples was tested using thermal shock tests and 85/85 tests. Cross section samples were made to analyze the possible failure mechanism of failed contacts. Two different test devices were used (bump sizes 50/spl times/50 /spl mu/m and 50/spl times/90 /spl mu/m). The effective pitch was 80 /spl mu/m in both samples and the number of contacts was around 200. The contact resistance was measured with the four-point method and the series resistance with the daisy chain method. The results are part of a European Union supported development project.
Sponsorship	Korea Sci. & Eng. Found.
Starting Page	428
Ending Page	432
File Size	661477
Page Count	5
File Format	PDF
ISBN	0780371577
DOI	10.1109/EMAP.2001.984022
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-11-19
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Testing Contacts Copper Bonding Conductive adhesives Flexible printed circuits Space technology Dielectric substrates Anisotropic magnetoresistance
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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