NDLI: Interfacial layer-free ZrO2 on Ge with 0.39-nm EOT, κ∼43, $∼2×10^{−3}$ $A/cm^{2}$ gate leakage, SS =85 mV/dec, Ion/Ioff $=6×10^{5},$ and high strain response

Content Provider	IEEE Xplore Digital Library
Author	Cheng-Ming Lin Hung-Chih Chang Yen-Ting Chen I-Hsieh Wong Huang-Siang Lan Shih-Jan Luo Jing-Yi Lin Yi-Jen Tseng Liu, C.W. Chenming Hu Fu-Liang Yang
Copyright Year	2012
Description	Author affiliation: National Nano Device Laboratories, Hsinchu 300, Taiwan (Fu-Liang Yang) \|\| Dept. of EECS, UC Berkeley, USA (Chenming Hu) \|\| Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taiwan (Yi-Jen Tseng) \|\| Graduate Institute of Electronic Engineering, National Taiwan University, Taiwan (Cheng-Ming Lin; Hung-Chih Chang; Yen-Ting Chen; I-Hsieh Wong; Huang-Siang Lan; Shih-Jan Luo; Jing-Yi Lin; Liu, C.W.)
Abstract	0.39-nm ultrathin EOT ZrO2 having κ value as high as ∼43 without an interfacial layer (IL) is demonstrated on Ge substrates. The EOT and gate leakage are much lower than the recent reported data [1]. In situ NH3/H2 remote plasma treatment (RPT) after RTO-grown ultrathin (<1nm) GeO2/Ge and prior to PEALD ZrO2 leads to the formation of tetragonal phase ZrO2 and the inhibition of GeOx IL regrowth. As the number of RPT cycles increases, it is observed that not only higher [N] but more GeO2 component formed on Ge surface. GeO diffuses into ZrO2 layer via the interface reaction (Ge+GeO2 → 2GeO) and stabilize the tetragonal phase ZrO2. The gate dielectric has a leakage current $∼10^{4}X$ lower than other reported dielectrics in this EOT region. Ge (001) pMOSFET has low SS of 85 mV/dec and high Ion/Ioff of $∼6×10^{5}$ at Vd= −1V, while nMOSFET has SS of 90 mV/dec and Ion/Ioff of $∼1×10^{5}$ at Vd=1V. The peak electron mobility is determined by the remote phonon scattering stemming from the high-κ value. The biaxial tensile strain of ∼0.04% applied on Ge (111) nMOSFET with an EOT=0.78nm produces a 4.8% drain current enhancement along the <110> channel.
File Size	1356145
File Format	PDF
ISBN	9781467348720
ISSN	2156017X
e-ISBN	9781467348713
e-ISBN	9781467348706
DOI	10.1109/IEDM.2012.6479086
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Tin Zirconium Surface treatment Substrates MOSFET circuits Surface fitting
Content Type	Text
Resource Type	Article

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