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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Pawlik, D. Romanczyk, B. Thomas, P. Rommel, S. Edirisooriya, M. Contreras-Guerrero, R. Droopad, R. Loh, W.-Y. Wong, M.H. Majumdar, K. Wang, W.-E. Kirsch, P.D. Jammy, R. |
| Copyright Year | 2012 |
| Description | Author affiliation: Dept. of Physics, Texas State University, San Marcos, TX 78666 (Edirisooriya, M.; Contreras-Guerrero, R.; Droopad, R.) || SEMATECH (Loh, W.-Y.; Wong, M.H.; Majumdar, K.; Wang, W.-E.; Kirsch, P.D.; Jammy, R.) || Dept. of Elec. and Micr. Eng., Rochester Institute of Technology, Rochester, NY 14623 (Pawlik, D.; Romanczyk, B.; Thomas, P.; Rommel, S.) |
| Abstract | Recently, III-V tunneling field effect transistors (TFET) for low voltage logic applications (<0.5V) have gained attention with the demonstration of sub-60 mV/dec. subthreshold slopes [1]. A key outstanding issue with TFETs is limited drive currents, due to non-optimized carrier tunneling. With that issue in mind, the aim of this work is to map III-V Esaki tunnel diode (TD) performance to engineer TDs with ultra high current densities while maintaining large peak-to-valley current ratios (PVCR). This work describes the most comprehensive experimental benchmarking of TD performance reported, including (i) GaAs, (ii) In0.53Ga0.47As, (iii) InAs, (iv) InAs0.9Sb0.1/Al0.4Ga0.6Sb, and (v) InAs/GaSb as a function of doping and effective tunnel barrier height. These results confirm that heterojunctions (bandgap engineering) and doping will enhance peak (JP) and Zener current densities beyond homojunction TDs [3], to a record $2.2MA/cm^{2}$ (JP) and 11 $MA/cm^{2}$ (@ −0.3 V), laying the fundamental groundwork for a III-V TFET at the 7 nm technology node. |
| File Size | 376368 |
| File Format | |
| ISBN | 9781467348720 |
| ISSN | 2156017X |
| e-ISBN | 9781467348713 |
| e-ISBN | 9781467348706 |
| DOI | 10.1109/IEDM.2012.6479118 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-12-10 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Current density Doping Gallium arsenide Silicon Heterojunctions Benchmark testing Substrates |
| Content Type | Text |
| Resource Type | Article |
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