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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Frank, E. Wilhelm, R. Ernst, R. Sangiovanni-Vincentelli, A. Di Natale, M. |
| Copyright Year | 2008 |
| Description | Author affiliation: VaST Syst., Munich (Frank, E.) |
| Abstract | Automotive systems are increasingly distributed and complex. Reduced time-to-market, cost and safety concerns require advance validation of the integrated systems and its components, from the functional, timing, and reliability standpoints. In particular, function correctness and performance may depend on communication and computation delays imposed by the selected architecture platform. Hence, the need for methods and tools capable of predicting the system-level timing behaviour (latencies and jitter), resulting from the HW platform selection, the synchronization between tasks and messages, and also from the synchronization and queuing policies of the middleware and RTOS levels. In this paper, we review methods and tools for the evaluation of the function performance and its timing correctness by simulation or by worst case static analysis. |
| Starting Page | 659 |
| Ending Page | 663 |
| File Size | 108277 |
| Page Count | 5 |
| File Format | |
| ISBN | 9783981080131 |
| DOI | 10.1109/DATE.2008.4484753 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-03-10 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | European Design Automation Association (EDAA) |
| Subject Keyword | Automotive engineering Computer architecture Delay Time to market Cost function Safety Timing jitter Middleware Analytical models Performance analysis |
| Content Type | Text |
| Resource Type | Article |
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