NDLI: Functional test generation for full scan circuits

Content Provider	IEEE Xplore Digital Library
Author	Pomeranz, I. Reddy, S.M.
Copyright Year	2000
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA (Pomeranz, I.)
Abstract	We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage independent of the circuit implementation. The functional fault model we consider consists of single state-transition faults. The test generation procedure we describe uses one of two approaches at any given time in order to minimize the number of tests while minimizing the test application time. (1) It may use scan to set the state of the circuit, and observe fault effects propagated to the next-state variables. (2) It may use transfer sequences to set the circuit state, or unique input-output sequences to propagate fault effects to the primary outputs. We present experimental results to demonstrate the effectiveness of scan-based functional tests.
Starting Page	396
Ending Page	401
File Size	37251
Page Count	6
File Format	PDF
ISBN	0769505376
DOI	10.1109/DATE.2000.840302
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-03-30
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Circuit faults Electrical fault detection Fault detection Cities and towns Circuit simulation Process design Terminology Delay
Content Type	Text
Resource Type	Article

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