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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xiaoping Tang Ruiqi Tian Wong, D.F. |
| Copyright Year | 2000 |
| Description | Author affiliation: Dept. of Comput. Sci., Texas Univ., Austin, TX, USA (Xiaoping Tang) |
| Abstract | Murata et al. (1996) introduced an elegant representation of block placement called sequence pair. All block placement algorithms which are based on sequence pairs use simulated annealing where the generation and evaluation of a large number of sequence pairs is required. Therefore, a fast algorithm is needed to evaluate each generated sequence pair, i.e. to translate the sequence pair to its corresponding block placement. This paper presents a new approach to evaluate a sequence pair based on comparing longest common subsequence in a pair of weighted sequences. We present a very simple and efficient O(n/sup 2/) algorithm to solve the sequence pair evaluation problem. We also show that using a more sophisticated data structure, the algorithm can be implemented to run in O(n log n) time. Both implementations of our algorithm are significantly faster than the previous O(n/sup 2/) graph-based algorithm. For example, we achieve 60/spl times/ speedup over the previous algorithm when input size n=128. |
| Starting Page | 106 |
| Ending Page | 111 |
| File Size | 109863 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769505376 |
| DOI | 10.1109/DATE.2000.840024 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2000-03-30 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Integrated circuit technology Costs Very large scale integration Transistors Simulated annealing Integrated circuit interconnections Data structures |
| Content Type | Text |
| Resource Type | Article |
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