NDLI: Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs

Content Provider	IEEE Xplore Digital Library
Author	Iyengar, V. Chakrabarty, K. Marinissen, E.J.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA (Iyengar, V.; Chakrabarty, K.)
Abstract	This paper describes an integrated framework for plug-and-play SOC test automation. This framework is based on a new approach for wrapper/TAM co-optimization based on rectangle packing. We first tailor TAM widths to each core's test data needs. We then use rectangle packing to develop an integrated scheduling algorithm that incorporates precedence and power constraints in the test schedule, while allowing the SOC integrator to designate a group of tests as preemptable. Finally, we study the relationship between TAM width and tester data volume to identify an effective TAM width for the SOC. We present experimental results for non-preemptive, preemptive, and power-constrained test scheduling, as well as for effective TAM width identification for an academic benchmark SOC and three industrial SOCs.
Sponsorship	ACM EDA Consortium IEEE SSCS
Starting Page	685
Ending Page	690
File Size	785231
Page Count	6
File Format	PDF
ISBN	1581134614
ISSN	0738100X
DOI	10.1109/DAC.2002.1012712
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-06-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Automatic testing Job shop scheduling System testing Circuit testing Logic testing Costs Processor scheduling Integrated circuit testing Design automation Pins
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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