NDLI: An area- and energy-efficient asynchronous Booth multiplier for mobile devices

Content Provider	IEEE Xplore Digital Library
Author	Hensley, J. Lastra, A. Singh, M.
Copyright Year	2004
Description	Author affiliation: Dept. of Comput. Sci., North Carolina Univ., Chapel Hill, NC, USA (Hensley, J.; Lastra, A.; Singh, M.)
Abstract	The recent explosion in the number of handheld multimedia devices has created a need for energy-efficient computation due to limited battery lifetimes. We focus on multiplication, which is needed in several application domains, e.g., 3D graphics, signal processing, and cryptography. We introduce an asynchronous implementation of a plain Booth multiplier (i.e., radix-2), which is both area- and energy-efficient, and therefore suitable for mobile applications. This paper makes the following contributions. First, a novel counterflow organization is introduced, in which the data bits flow in one direction, and the Booth commands piggyback on the acknowledgments flowing in the opposite direction. Second, the arithmetic and shifter units are merged together to obtain significant improvement in area, energy as well as speed. Third, our design performs overlapped execution of multiple iterations of the Booth algorithm. Finally, the design is quite modular, which allows scaling to arbitrary operand widths, without gate resizing or cycle time overheads. Spice simulations in a 0.18 /spl mu/m TSMC process at 1.8 V, indicate promising performance: the multiplier takes 1.08 ns per Booth iteration, regardless of the operand widths, thereby demonstrating the scalability of our approach. In addition, the multiplier is fully functional at reduced supply voltages (e.g., 1.0 V), and thus capable of dynamically trading off performance for energy efficiency.
Sponsorship	IEEE Comput. Soc. IEEE Circuits and Syst. Soc
Starting Page	18
Ending Page	25
File Size	440392
Page Count	8
File Format	PDF
ISBN	0769522319
ISSN	10636404
DOI	10.1109/ICCD.2004.1347892
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-10-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy efficiency Explosions Handheld computers Batteries Graphics Signal processing Cryptography Arithmetic Algorithm design and analysis Signal processing algorithms
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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